5CSEBA2U23I7LN vs 5CSEBA2U23C7N Comparison

Detailed side-by-side comparison of 5CSEBA2U23I7LN by Intel and 5CSEBA2U23C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter 5CSEBA2U23I7LN 5CSEBA2U23C7N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $80.64 $76.90
Family Cyclone V SE SoC FPGA Cyclone V SE SoC FPGA
Logic Elements 25,000 25K
HPS Cores Dual ARM Cortex-A9 MPCore with NEON + FPU —
Maximum HPS Clock Frequency 925 MHz —
Embedded Memory (M10K blocks) 66 blocks (1,440 Kbits total) —
Embedded Memory (MLAB) [DATA_NEEDED: MLAB Kbits] —
18x18 Multipliers 132 —
PLLs 4 (fractional) —
Global Clock Networks 20 —
User I/O Banks 8 —
Maximum User I/O Pins 364 —
Package 672-pin UBGA (23x23 mm, 0.8 mm pitch) 672-UBGA (23x23 mm)
Operating Temperature (Junction) -40C to +100C (industrial, I7 grade) —
Process Technology TSMC 28 nm low-power TSMC 28 nm low-power
Hard Memory Controller DDR3 / DDR3L up to DDR3-1600 with ECC —
HPS Peripherals USB 2.0 OTG, Gigabit Ethernet, CAN, SPI, I2C, UART, SD/MMC, NAND flash Gigabit Ethernet MAC, USB 2.0 OTG, NAND, SD/eMMC
Lead-Free (L suffix) Yes —
RoHS Status Compliant Compliant
Hard Processor System — Dual ARM Cortex-A9 MPCore with CoreSight
HPS Maximum Frequency — 800 MHz (application grade)
User I/O — 188
DSP Blocks — Variable-precision (count [DATA_NEEDED: DSP block count])
Embedded Memory — M10K RAM blocks (total bits [DATA_NEEDED: M10K total bits])
HPS Memory Interface — DDR3 / DDR3L / LPDDR2 controller
High-Speed Transceivers — Present (channel count [DATA_NEEDED: transceiver count])
Operating Temperature — [DATA_NEEDED: Tj/Ta commercial range]
Mounting Type — Surface Mount (BGA)

Datasheets & Resources

Browse All Products Create BOM Request Quote