5M160ZM68A5N vs 5M160ZE64C5N Comparison
Detailed side-by-side comparison of 5M160ZM68A5N by Altera and 5M160ZE64C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 5M160ZM68A5N | 5M160ZE64C5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.10 | $4.95 |
| Family | MAX V | — |
| Device Variant | 5M160Z (128 macrocells, 1.8 V, speed grade -7) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 4 | — |
| User I/Os | 52 | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Propagation Delay (tPD) | 14 ns | — |
| Standby Current (ICCSTBY) | 25 uA (typical) | — |
| Core Supply Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Package | 68-ball FBGA (FineLine BGA), 0.5 mm pitch | 64-pin EQFP (E64) with exposed pad |
| JEDEC Package Code | S-PBGA-B68 | — |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Operating Temperature | -40C to +125C (industrial) | 0°C to +85°C (commercial) |
| Programming Interface | IEEE Std 1149.1 JTAG BST | JTAG (IEEE 1149.1) / In-system |
| Automotive Qualification | AEC-Q100 | — |
| RoHS Status | Compliant | Compliant |
| Series | — | MAX V |
| Device Family | — | MAX V (5M160Z) |
| Logic Elements (LE) | — | 160 |
| User I/O Pins | — | 54 |
| Maximum Operating Frequency (fMAX) | — | 118.3 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 1.4 ns (per datasheet) |
| Configuration Memory | — | Non-volatile Flash |
| Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| MSL Level | — | 3 |