5M240ZM68C5N vs 5M240ZM68I5N Comparison
Detailed side-by-side comparison of 5M240ZM68C5N by Intel and 5M240ZM68I5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 5M240ZM68C5N | 5M240ZM68I5N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.05 | $1.25 |
| Series | MAX V | MAX V |
| Family | MAX V (5M240Z) | — |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Architecture | Non-volatile flash-based | — |
| Macro Cells | 192 | — |
| Logic Elements | 240 | 240 |
| Logic Array Blocks (LABs) | 4 | — |
| Maximum Operating Frequency | 118.3 MHz | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Banks | MultiVolt I/O, 1.5/1.8/2.5/3.3 V compatible | — |
| Global Clocks | 4 | — |
| User Flash Memory | Yes (integrated) | — |
| Package | 68-ball Micro FBGA (BGA-68) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 °C to +85 °C (commercial) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| RoHS Status | Compliant | Compliant |
| Number of Macrocells | — | 192 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Configuration Memory | — | Nonvolatile Flash |
| Package Type | — | TFBGA-68 |
| Number of Terminals | — | 68 (ball) |
| Package Code | — | TFBGA |
| Form of Terminal | — | Ball |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| JTAG Interface | — | TMS, TDI, TDO, TCK (Bank 1) |
| Programming Method | — | JTAG / in-system programmable |
| Supply Voltage | — | [DATA_NEEDED: VCCINT and VCCIO levels] |
| I/O Standards | — | Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins) |
| Lead Free | — | Yes |