5M240ZM68C5N vs 5M240ZM68I5N 对比
详细并排对比 5M240ZM68C5N 出自 Intel 和 5M240ZM68I5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 5M240ZM68C5N | 5M240ZM68I5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.05 | $1.25 |
| Series | MAX V | MAX V |
| Family | MAX V (5M240Z) | — |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Architecture | Non-volatile flash-based | — |
| Macro Cells | 192 | — |
| Logic Elements | 240 | 240 |
| Logic Array Blocks (LABs) | 4 | — |
| Maximum Operating Frequency | 118.3 MHz | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Banks | MultiVolt I/O, 1.5/1.8/2.5/3.3 V compatible | — |
| Global Clocks | 4 | — |
| User Flash Memory | Yes (integrated) | — |
| 封装 | 68-ball Micro FBGA (BGA-68) | — |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | 0 °C to +85 °C (commercial) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| RoHS 状态 | Compliant | Compliant |
| Number of Macrocells | — | 192 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Configuration Memory | — | Nonvolatile Flash |
| Package Type | — | TFBGA-68 |
| Number of Terminals | — | 68 (ball) |
| Package Code | — | TFBGA |
| Form of Terminal | — | Ball |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| JTAG Interface | — | TMS, TDI, TDO, TCK (Bank 1) |
| Programming Method | — | JTAG / in-system programmable |
| 电源电压 | — | [DATA_NEEDED: VCCINT and VCCIO levels] |
| I/O Standards | — | Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins) |
| Lead Free | — | Yes |