A42MX09-3TQG176 vs A42MX24-TQG176 Comparison
Detailed side-by-side comparison of A42MX09-3TQG176 by Microchip Technology and A42MX24-TQG176 by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
A42MX09-3TQG176 - MX FPGA 14K Gates 176-TQFP | Microchip
A42MX09-3TQG176 ✓ ActiveMicrochip Technology
A42MX24-TQG176 - 36K Gate MX FPGA, TQFP-176 | Microchip
A42MX24-TQG176 ✓ ActiveSpecification Comparison
| Parameter | A42MX09-3TQG176 | A42MX24-TQG176 |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $32.10 | $28.40 |
| Family | MX (Actel/Microsemi antifuse FPGA) | 42MX (Actel MX) antifuse FPGA |
| System Gates | 14000 | 36000 gates |
| Equivalent Gates | Approx. 9000 | — |
| Logic Blocks (CLBs) | 684 | — |
| Number of I/O | 104 | — |
| Supply Voltage (core) | 3 V to 3.6 V | — |
| Supply Voltage (I/O) | 4.75 V to 5.25 V | — |
| Operating Temperature | 0C to +70C (TA) | [DATA_NEEDED: operating temperature range] |
| Package | 176-TQFP (24x24 mm), 0.5 mm pitch | 176-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Speed Grade | 3 | Standard (see ordering code suffix) |
| Process Technology | 0.45 um CMOS | Antifuse CMOS |
| Programming Technology | Antifuse (one-time programmable) | Antifuse (one-time programmable) |
| Packaging | Tray | — |
| RoHS Status | ROHS3 Compliant | [DATA_NEEDED: RoHS status] |
| Product Status | Active | — |
| Manufacturer Lead Time | 10 weeks | — |
| Logic Cells | — | 912 cells |
| User I/O | — | 150 |
| Core Supply Voltage | — | 5 V |
| I/O Supply Voltage | — | 3.3 V / 5 V |
| Configuration Storage | — | Non-volatile (no external PROM required) |
| D-modules | — | Wide-decode periphery logic (A42MX24 and A42MX36) |
| MSL Level | — | [DATA_NEEDED: moisture sensitivity level] |