EP1K10QC208-2 vs EP1K10QC208-2N Comparison
Detailed side-by-side comparison of EP1K10QC208-2 by Intel and EP1K10QC208-2N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1K10QC208-2 - ACEX-1K FPGA, 10K Gates, 576 Logic Elements, 208-PQFP | Intel (Altera)
EP1K10QC208-2 Obsolete
Specification Comparison
| Parameter | EP1K10QC208-2 | EP1K10QC208-2N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Family | ACEX-1K | ACEX-1K |
| Logic Elements | 576 | 576 |
| Configurable Logic Blocks (CLBs) | 72 | — |
| Equivalent Gates | 10,000 | — |
| Embedded RAM Bits | 12,288 | — |
| Embedded Array Blocks (EABs) | 3 (per datasheet, 4096-bit each) | 12 |
| Maximum User I/O | 120 | — |
| Supply Voltage (Core) | 2.5 V | — |
| Speed Grade | -2 | — |
| Package | 208-pin BQFP (PQFP, gull-wing) | 208-BFQFP (PQFP, 28x28 mm) |
| Operating Temperature | Commercial (0C to +70C) | 0 °C to +70 °C (commercial) |
| Configuration Method | SRAM, serial | — |
| Process Technology | 2.5 V CMOS | 0.22 µm CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | IEEE 1149.1 Boundary Scan |
| Lead-Free / RoHS | Non-compliant (legacy Altera part) | — |
| Typical Gates | — | 10,000 |
| Logic Array Blocks (LABs) | — | 72 |
| Total RAM Bits | — | 12,288 |
| User I/O Pins | — | 120 |
| Core Voltage | — | 2.5 V (2.375 V to 2.625 V) |
| Mounting Type | — | Surface Mount |
| Configuration Mode | — | Serial (AS) / Passive Serial (PS) |
| RoHS Status | — | Compliant |