EP1S10F780C7 vs EP1S10F780C6N Comparison

Detailed side-by-side comparison of EP1S10F780C7 by Intel and EP1S10F780C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S10F780C7 EP1S10F780C6N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family Stratix Stratix
Logic Elements 10,570 —
Total RAM Bits 920,448 —
User I/O Count 426 426 (per FindIC)
Core Voltage 1.5 V —
Process Technology 130 nm CMOS 130 nm CMOS
Package 780-ball FC-FBGA (29 × 29 mm, 1.0 mm pitch) FBGA-780 (29 x 29 mm, 1.0 mm pitch)
Mounting Type Surface Mount (BGA) Surface Mount
Operating Temperature 0 °C to 85 °C (Commercial) 0 C to +85 C (Commercial)
Speed Grade C7 —
Maximum Internal Frequency 420.17 MHz —
Configuration Modes Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG —
DSP Blocks Yes (embedded) —
I/O Standards Supported LVTTL, LVCMOS, LVDS, SSTL, HSTL (per bank) —
MSL Level [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL rating]
RoHS Status Non-compliant (per third-party distributor listing) Non-compliant (LEAD FR finish per AiPCBA datasheet)
Logic Family CMOS CMOS
Logic Elements (LEs) — 10,570
Configurable Logic Blocks (CLBs) — 1,200
Embedded Memory — 920 Kbit (TriMatrix)
Core Supply Voltage — 1.5 V
I/O Supply Voltage — Multi-voltage (3.3 V / 2.5 V / 1.8 V LVTTL/LVCMOS, LVDS)
Maximum Internal Clock Frequency — 450.05 MHz
Pin / Ball Count — 780
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous
Lead Finish — SnPb (LEAD FR / non-RoHS variant)

Datasheets & Resources

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