EP1S20F672C7N vs EP1S25F672C7N Comparison

Detailed side-by-side comparison of EP1S20F672C7N by Intel and EP1S25F672C7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S20F672C7N EP1S25F672C7N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $109.20 $535.00
Series Stratix (first generation) —
Family Stratix —
Logic Elements (LEs) 18,460 25,660
Logic Cells 18,460 —
Configurable Logic Blocks (CLBs) 2,132 —
Embedded Memory (TriMatrix) 1,669,248 bits (426 Kbit total) —
DSP Blocks 56 (dedicated 18x18 multipliers) —
Maximum User I/O 586 473
I/O Banks [DATA_NEEDED: I/O bank count] —
PLLs Up to 12 —
Maximum Operating Frequency 420.17 MHz —
Core Voltage 1.5 V —
Process Technology 130 nm CMOS 0.13 µm CMOS
Package 672-FBGA (FineLine BGA) 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch
Package Body Size 35 mm x 35 mm —
Ball Pitch 1.27 mm —
Operating Temperature 0°C to +85°C (commercial) 0 °C to 85 °C (commercial)
Speed Grade C7 (-7) —
Mounting Type Surface Mount Surface Mount
Lead-Free / RoHS Yes (lead-free finish, RoHS compliant) —
Configuration Modes PS, PPS, FPP, JTAG —
MSL Level [DATA_NEEDED: moisture sensitivity level] [DATA_NEEDED: MSL rating]
Device Family — Stratix
Logic Array Blocks (LABs) — 2,566
Embedded Memory Bits — 1,944,576
Number of I/O Pins — 672 (BGA balls)
Core Supply Voltage (VCCINT) — 1.5 V
I/O Supply Voltage (VCCIO) — [DATA_NEEDED: bank-dependent 1.2 V–3.3 V]
Configuration Method — JTAG / Passive Serial / Active Serial
RoHS Status — [DATA_NEEDED: confirm from product page]

Datasheets & Resources

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