EP1S25F780C5N vs EP1S25F780C5 Comparison
Detailed side-by-side comparison of EP1S25F780C5N by Intel and EP1S25F780C5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP1S25F780C5 - Stratix I FPGA, 25,660 LEs, 597 I/O, 780-FBGA | Altera / Intel
EP1S25F780C5 β Last Time BuySpecification Comparison
| Parameter | EP1S25F780C5N | EP1S25F780C5 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $595.00 | $1,249.50 |
| Family | Stratix | Stratix I |
| Logic Elements | 25,660 | 25,660 |
| Logic Array Blocks (LABs) | 2,566 | 2,566 |
| Maximum User I/O | 597 | β |
| Package | 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch | 780-FBGA (29x29 mm) |
| Process Technology | 130 nm CMOS | 0.13 Β΅m CMOS, SRAM-based |
| Core Supply Voltage | 1.5 V | β |
| Operating Temperature | 0 C to 85 C (Commercial Extended) | β |
| Embedded Memory | TriMatrix memory blocks, up to ~1.92 Mbits total | β |
| DSP Blocks | Dedicated multiplier/accumulator blocks | β |
| PLLs | 4 | Up to 8 per device |
| I/O Banks | 12 | β |
| Maximum Frequency (internal) | up to 500 MHz logic, 420 MHz DSP | β |
| Supported I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, PCI, PCI-X | β |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, JTAG | β |
| RoHS Status | [DATA_NEEDED: confirm per specific reel lot] | Compliant per Altera product page |
| Mounting Type | Surface Mount (BGA) | Surface Mount (SMT, BGA) |
| MSL Level | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | β |
| Total RAM Bits | β | 1,944,576 |
| Embedded Multipliers (DSP blocks) | β | 80 (typical) |
| User I/O Count | β | 597 |
| Core Voltage (VCCINT) | β | 1.425 V to 1.575 V |
| Speed Grade | β | C5 |
| Operating Temperature (TJ) | β | 0 Β°C to +85 Β°C (commercial) |
| LVDS Performance | β | Up to 7.6 Gbps (claim per family datasheet) |
| Global Clock Networks | β | 14 |