EP1S30B956C6 vs EP1S40B956C6N Comparison
Detailed side-by-side comparison of EP1S30B956C6 by Altera and EP1S40B956C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S30B956C6 | EP1S40B956C6N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $78.00 | $1,050.00 |
| Family | Stratix | Altera Stratix (1st generation) |
| Logic Elements (LEs) | 32,470 | 41,250 |
| Logic Array Blocks (LABs) | 3,247 | 4,125 |
| Embedded Memory Bits | 3,317,184 (approximately 3.4 Mbit) | β |
| Maximum User I/O | 683 | 683 |
| Process Technology | 130 nm CMOS | 0.13 Β΅m CMOS |
| Core Voltage (VCCINT) | 1.5 V | β |
| Operating Temperature | 0 C to 85 C (Commercial) | 0 Β°C to +85 Β°C (Commercial) |
| Speed Grade | C6 | C6 (commercial, mid-speed) |
| Package | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch | 956-ball FineLine BGA (FCBGA) |
| Mounting Type | Surface Mount | Surface Mount |
| Maximum Internal Frequency | 450.05 MHz (per family datasheet) | β |
| DSP Blocks | Yes (Stratix DSP blocks) | β |
| PLLs | Up to 12 | β |
| Configuration Modes | Passive Serial (PS), Passive Parallel (PP), JTAG | β |
| RoHS Status | Not confirmed - pre-RoHS part | [DATA_NEEDED: RoHS compliance] |
| MSL Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Lead-Free | Unknown | β |
| Series | β | Stratix |
| Embedded Memory | β | 3,423,744 bits (~3.4 Mbit) |
| Supply Voltage | β | 1.425 V to 1.575 V (1.5 V nominal) |
| Package Dimensions | β | 40 mm x 40 mm |
| Ball Pitch | β | 1.27 mm |
| Configuration Interface | β | JTAG (IEEE 1149.1), Passive Serial, Active Serial |