EP1S30B956C6 vs EP1S40B956C6N Vergleich
Detaillierter Direktvergleich von EP1S30B956C6 von Altera und EP1S40B956C6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S30B956C6 | EP1S40B956C6N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $78,00 | $1.050,00 |
| Family | Stratix | Altera Stratix (1st generation) |
| Logic Elements (LEs) | 32,470 | 41,250 |
| Logic Array Blocks (LABs) | 3,247 | 4,125 |
| Embedded Memory Bits | 3,317,184 (approximately 3.4 Mbit) | — |
| Maximum User I/O | 683 | 683 |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Voltage (VCCINT) | 1.5 V | — |
| Betriebstemperatur | 0 C to 85 C (Commercial) | 0 °C to +85 °C (Commercial) |
| Speed Grade | C6 | C6 (commercial, mid-speed) |
| Gehäuse | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch | 956-ball FineLine BGA (FCBGA) |
| Montageart | Surface Mount | Surface Mount |
| Maximum Internal Frequency | 450.05 MHz (per family datasheet) | — |
| DSP Blocks | Yes (Stratix DSP blocks) | — |
| PLLs | Up to 12 | — |
| Configuration Modes | Passive Serial (PS), Passive Parallel (PP), JTAG | — |
| RoHS-Status | Not confirmed - pre-RoHS part | [DATA_NEEDED: RoHS compliance] |
| MSL-Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Lead-Free | Unknown | — |
| Series | — | Stratix |
| Embedded Memory | — | 3,423,744 bits (~3.4 Mbit) |
| Versorgungsspannung | — | 1.425 V to 1.575 V (1.5 V nominal) |
| Package Dimensions | — | 40 mm x 40 mm |
| Ball Pitch | — | 1.27 mm |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Active Serial |