EP1S60F1020I6 vs EP1S60F1020C6N Comparison

Detailed side-by-side comparison of EP1S60F1020I6 by Altera and EP1S60F1020C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S60F1020I6 EP1S60F1020C6N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $3,845.20 $195.00
Family Stratix Stratix (EP1S)
Logic Elements 57,120 —
Logic Array Blocks (LABs) 6,570 —
Embedded Memory Bits 5,215,104 bits —
Maximum User I/O 773 —
Process Technology 130 nm CMOS —
Core Supply Voltage 1.5 V —
Maximum Internal Frequency 450 MHz —
Package 1020-ball FC-FBGA (33 x 33 mm, 1 mm pitch) —
Operating Temperature (I-grade) -40C to +100C (case) —
Speed Grade -6 C6 (mid-tier)
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
RoHS Status Compliant Compliant (per 'N' suffix)
Lead-Free Yes —
MSL Level 3 [DATA_NEEDED: MSL rating]
Series — Stratix
Logic Elements (LEs) — 57,120
Logic Cells — 6,570 blocks (per chipdig datasheet summary)
Embedded RAM (Total Bits) — 5,215,104 bits
Embedded Multipliers — 773 (18x18)
Maximum User I/O Pins — Per datasheet, package-dependent (F1020 variant)
Package Type — 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch
Logic Family / Process — CMOS, 0.13 µm
Operating Temperature — 0°C to +85°C (Commercial)
Supply Voltage — Per datasheet (Stratix Device Handbook Vol. 1)
Lead-Free / Pb-Free — Yes (suffix 'N')
Configuration — JTAG / Passive Serial / Fast Passive Parallel via MSEL pins
PLL Count — 12 (per Stratix family datasheet)
Memory Block Types — TriMatrix (M512, M4K, M-RAM)

Datasheets & Resources

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