EP1S80F1020C6 vs EP1S80F1020C5N Comparison
Detailed side-by-side comparison of EP1S80F1020C6 by Intel and EP1S80F1020C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S80F1020C6 | EP1S80F1020C5N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | End of Life |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,180.00 | $0.00 |
| Series | Stratix | — |
| Logic Elements | 79,040 | 79,040 |
| Total RAM Bits | 7,427,520 | — |
| Number of Logic Blocks / LABs | 9,191 | — |
| Number of I/O Pins (max) | 773 user I/O | — |
| Number of Pins / Balls | 1020 | — |
| Package Type | FC-FBGA (flip-chip fine-pitch BGA), 33 x 33 mm, 1.0 mm pitch | FBGA-1020 |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.5 V nominal (1.425 V to 1.575 V) | — |
| Speed Grade | C6 | C5 |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Mounting Type | Surface Mount | Surface Mount |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| Family Description | FPGA - Field Programmable Gate Array | — |
| Embedded Memory | TriMatrix (three block sizes, true/simple dual-port) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + serial/parallel configuration device | — |
| Design Tool | Quartus II (legacy, Stratix family) | — |
| RoHS Status | [DATA_NEEDED: rohs status] | unknown |
| Moisture Sensitivity Level (MSL) | [DATA_NEEDED: MSL rating] | — |
| Product Type | — | Field Programmable Gate Array (FPGA) |
| Device Family | — | Stratix |
| Logic Technology | — | CMOS |
| Logic Cells | — | 9,191 |
| Logic Array Blocks | — | 7,904 |
| User I/O Pins | — | 773 I/O |
| Total Package Pins or Balls | — | 1,020 |
| Package Dimensions | — | 33 mm x 33 mm |
| Ball Pitch | — | 1 mm |
| Operating Temperature | — | 0 °C to 85 °C |
| Supply Voltage | — | [DATA_NEEDED: operating supply voltage] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | not_applicable |
| Embedded Memory Capacity | — | [DATA_NEEDED: embedded memory capacity] |
| Phase-Locked Loops | — | [DATA_NEEDED: PLL count] |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |