EP20K1000CF672C7 vs EP20K100CB356C7 Comparison
Detailed side-by-side comparison of EP20K1000CF672C7 by Intel and EP20K100CB356C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel
EP20K100CB356C7 ⚠ Last Time BuySpecification Comparison
| Parameter | EP20K1000CF672C7 | EP20K100CB356C7 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Family | APEX 20KC | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 1,000,000 (typical) | — |
| Logic Elements / Cells | 38400 | — |
| Maximum Internal Frequency | 375.94 MHz | — |
| Propagation Delay | 1.6 ns (typical) | — |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.18 μm CMOS |
| Core Supply Voltage | 1.8 V | — |
| User I/O Count | 488 (some sources list 508) | — |
| Package | 672-ball FC-FBGA (45 × 45 mm, 1.27 mm pitch) | 356-LBGA |
| Mounting Type | Surface Mount | — |
| Operating Temperature | 0 °C to +85 °C (commercial, C suffix) | Commercial grade |
| Speed Grade | C7 (fastest) | C7 |
| Embedded Memory (EAB) | Embedded array blocks (RAM/CAM/ROM) | — |
| PLL Count | 4 | — |
| Configuration Interface | Passive Serial, JTAG (IEEE 1149.1), Fast Passive Parallel | — |
| RoHS Status | [DATA_NEEDED: RoHS status - part predates common RoHS reporting] | [DATA_NEEDED: RoHS compliance status] |
| MSL Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | APEX20K |
| Typical Gates | — | 100,000 |
| Maximum Logic Elements | — | 53,248 |
| User I/O Pins | — | 252 |
| Embedded Memory (Bits) | — | 53,248 |
| Number of PLLs | — | 4 |
| Core Voltage | — | 2.5 V |
| I/O Standards Supported | — | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) |
| Programming Interface | — | IEEE 1149.1 JTAG |