EP20K100EQC208-1X vs EP20K100EQC208-3N Comparison

Detailed side-by-side comparison of EP20K100EQC208-1X by Intel and EP20K100EQC208-3N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K100EQC208-3N EP20K100EQC208-3N FPGA - 1.8V APEX-20KE | Altera

EP20K100EQC208-3N FPGA - 1.8V APEX-20KE | Altera

EP20K100EQC208-3N Obsolete

Specification Comparison

Parameter EP20K100EQC208-1X EP20K100EQC208-3N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family APEX-20KE —
Logic Elements 4,160 —
Typical Gate Count 100,000 gates —
Embedded Memory (bits) 53,248 —
Embedded System Blocks (ESBs) 26 —
Maximum User I/O 151 —
Package 208-pin PQFP (EQC208) —
Process Technology 0.15 micrometer CMOS, all-layer copper [DATA_NEEDED: Process technology]
Propagation Delay 1.6 ns 2.2 ns
Speed Grade -1 (standard) -3
Operating Temperature 0C to +85C —
Core Supply Voltage 1.8 V 1.8 V
MultiVolt I/O Support 1.8V / 2.5V / 3.3V / 5.0V —
PLLs 4 —
Configuration Interface JTAG (IEEE 1149.1), passive serial/parallel —
MSL Level 3 (168 Hours) [DATA_NEEDED: MSL level]
RoHS Status Lead-free (Pb-free), RoHS compliant —
Product Family — APEX-20KE
FPGA Type — Field Programmable Gate Array
Number of Logic Elements — 4160
Typical Gates — 100000
System Gates — 263000
Total RAM Bits — 53248
Number of User I/O — 151
Maximum Clock Frequency — 250 MHz
Package Type — 208-BFQFP (PQFP-208)
Mounting Type — Surface Mount
Number of Pins — 208
Operating Temperature Range — 0 °C to +85 °C
I/O Standards Supported — [DATA_NEEDED: Supported I/O standards]
Package Body Dimensions — [DATA_NEEDED: Package body dimensions]
Terminal Pitch — [DATA_NEEDED: Terminal pitch]

Datasheets & Resources

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