EP20K100QC208-1N vs EP20K100EQC208-3N Comparison

Detailed side-by-side comparison of EP20K100QC208-1N by Intel and EP20K100EQC208-3N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K100EQC208-3N EP20K100EQC208-3N FPGA - 1.8V APEX-20KE | Altera

EP20K100EQC208-3N FPGA - 1.8V APEX-20KE | Altera

EP20K100EQC208-3N Obsolete

Specification Comparison

Parameter EP20K100QC208-1N EP20K100EQC208-3N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Family APEX 20K —
Typical Gates 100,000 100000
Logic Elements 4,160 —
Embedded System Blocks (ESBs) 26 —
Maximum User I/Os 159 —
Dedicated Inputs 4 —
Package PQFP-208 (0.5 mm pitch) —
Process Technology 0.22 µm CMOS [DATA_NEEDED: Process technology]
Core Voltage (VCCINT) 2.5 V —
I/O Voltage (VCCIO) 2.5 V / 3.3 V / 5 V (multi-voltage) —
Propagation Delay 1.6 ns 2.2 ns
Maximum Internal Frequency 250 MHz —
Operating Temperature 0 °C to +85 °C (commercial) —
Programming Interface IEEE 1149.1 (JTAG) ISP —
Supply Voltage Range 2.375 V to 2.625 V —
Speed Grade -1 -3
Product Family — APEX-20KE
FPGA Type — Field Programmable Gate Array
Number of Logic Elements — 4160
System Gates — 263000
Total RAM Bits — 53248
Number of User I/O — 151
Core Supply Voltage — 1.8 V
Maximum Clock Frequency — 250 MHz
Package Type — 208-BFQFP (PQFP-208)
Mounting Type — Surface Mount
Number of Pins — 208
Operating Temperature Range — 0 °C to +85 °C
I/O Standards Supported — [DATA_NEEDED: Supported I/O standards]
Package Body Dimensions — [DATA_NEEDED: Package body dimensions]
Terminal Pitch — [DATA_NEEDED: Terminal pitch]
MSL Level — [DATA_NEEDED: MSL level]

Datasheets & Resources

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