EP20K1500EBC652-1X vs EP20K1000EBI652-2 Comparison
Detailed side-by-side comparison of EP20K1500EBC652-1X by Altera and EP20K1000EBI652-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K1500EBC652-1X - APEX 20KE 1.5M Gates FPGA | Altera | BGA-652
EP20K1500EBC652-1X ObsoleteAltera
EP20K1000EBI652-2 - APEX 20KE 1M Gates FPGA, BGA-652 | Intel / Altera
EP20K1000EBI652-2 ObsoleteSpecification Comparison
| Parameter | EP20K1500EBC652-1X | EP20K1000EBI652-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | APEX 20KE | — |
| Logic Elements / Cells | 51840 | — |
| System Gates | 1.5 M | — |
| Macros | 3456 | — |
| Total RAM Bits | 442368 | — |
| User I/O | 488 | — |
| Number of I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Propagation Delay | 1.84 ns | 1.6 ns |
| Internal Frequency | 160 MHz (per digchip) / 400 MHz (per fpgakey) | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.22 µm CMOS | 0.18 micrometer CMOS, all-layer copper |
| Operating Temperature | 0 °C to +85 °C (commercial) | — |
| Package | 652-ball BGA (FCBGA / PBGA652) | BGA-652 (FineLine BGA, 45 x 45 mm) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| MSL Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Configuration Method | JTAG / SRAM | — |
| Architecture | MultiCore (LUT + product-term) | — |
| Device Family | — | APEX 20KE |
| Logic Elements | — | 38,400 |
| Typical Gates | — | 1,000,000 |
| Maximum User I/O | — | 488 |
| Ball Pitch | — | 1.27 mm |
| Speed Grade | — | -2 |
| Operating Temperature Range | — | Industrial -40C to +100C |
| Supply Voltage (Core) | — | 1.8 V |
| Embedded System Block Memory | — | [DATA_NEEDED: ESB memory size] |
| Embedded Multiplier/Accumulator Blocks | — | [DATA_NEEDED: number of multiplier blocks] |
| Phase-Locked Loops (PLLs) | — | 4 |
| Internal Operating Frequency | — | 350 MHz |
| Configuration Modes | — | PS, PPS, PPA, JTAG |