EP20K160EQC240-2 vs EP20K160EQC240-3N Comparison
Detailed side-by-side comparison of EP20K160EQC240-2 by Intel and EP20K160EQC240-3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K160EQC240-2 | EP20K160EQC240-3N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | APEX 20KE | APEX 20K |
| Typical Gates | 160,000 | — |
| Logic Elements (LEs) | 6,400 | — |
| Embedded System Blocks (ESBs) | 64 | — |
| Maximum Embedded Memory | 56 Kbits (approx. 7 Kbytes usable) | — |
| Maximum User I/O (this package) | 175 | — |
| Maximum User I/O (largest package) | 271 | — |
| PLLs | 4 | — |
| Internal Frequency (max) | 160 MHz | — |
| Propagation Delay | 1.55 ns | 1.55 ns |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.18-micron SRAM CMOS | 0.22 µm CMOS |
| Package | PQFP-240 (QFP-240, FQFP) | 240-pin PQFP (Power Quad Flat Pack) |
| Pin Count | 240 | — |
| Mounting Type | Surface Mount (Gull Wing) | — |
| Operating Temperature | 0 C to 85 C (Commercial) | 0 °C to 85 °C |
| Speed Grade | -2 | -3 |
| Supply Voltage (core) | [DATA_NEEDED: core VCC value] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, GTL+, LVDS | — |
| Configuration Modes | Passive Serial, Passive Parallel Synchronous, JTAG | — |
| JTAG Support | IEEE Std. 1149.1 boundary-scan | — |
| RoHS Status | Non-compliant (original Altera-era PQFP) | [DATA_NEEDED: RoHS status] |
| MultiCore Architecture | Yes (Logic + ESB + I/O) | — |
| 5.0 V Tolerance | Achievable with external resistor | — |
| System Gates | — | 160,000 |
| Logic Elements / Cells | — | 6400 |
| Embedded Memory | — | 87,040 bits (EAB) |
| User I/Os | — | 271 |
| Internal Frequency | — | 323 MHz |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 3.3 V |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |