EP20K160EQC240-2 vs EP20K160EQC240-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K160EQC240-2 sa pamamagitan ng Intel at EP20K160EQC240-3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K160EQC240-2 | EP20K160EQC240-3N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX 20KE | APEX 20K |
| Typical Gates | 160,000 | — |
| Logic Elements (LEs) | 6,400 | — |
| Embedded System Blocks (ESBs) | 64 | — |
| Maximum Embedded Memory | 56 Kbits (approx. 7 Kbytes usable) | — |
| Maximum User I/O (this package) | 175 | — |
| Maximum User I/O (largest package) | 271 | — |
| PLLs | 4 | — |
| Internal Frequency (max) | 160 MHz | — |
| Propagation Delay | 1.55 ns | 1.55 ns |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.18-micron SRAM CMOS | 0.22 µm CMOS |
| Packhaging | PQFP-240 (QFP-240, FQFP) | 240-pin PQFP (Power Quad Flat Pack) |
| Bilang ng Pin | 240 | — |
| Uri ng Pagpapasok | Surface Mount (Gull Wing) | — |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | 0 °C to 85 °C |
| Speed Grade | -2 | -3 |
| Supply Voltage (core) | [DATA_NEEDED: core VCC value] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, GTL+, LVDS | — |
| Configuration Modes | Passive Serial, Passive Parallel Synchronous, JTAG | — |
| JTAG Support | IEEE Std. 1149.1 boundary-scan | — |
| Tindminan RoHS | Non-compliant (original Altera-era PQFP) | [DATA_NEEDED: RoHS status] |
| MultiCore Architecture | Yes (Logic + ESB + I/O) | — |
| 5.0 V Tolerance | Achievable with external resistor | — |
| System Gates | — | 160,000 |
| Logic Elements / Cells | — | 6400 |
| Embedded Memory | — | 87,040 bits (EAB) |
| User I/Os | — | 271 |
| Internal Frequency | — | 323 MHz |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 3.3 V |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |