EP20K200BC356-2XV vs EP20K200BC356-1 Comparison
Detailed side-by-side comparison of EP20K200BC356-2XV by Altera and EP20K200BC356-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K200BC356-2XV - APEX-20K FPGA, 8320 LE, 356-BGA | Altera/Intel
EP20K200BC356-2XV ObsoleteSpecification Comparison
| Parameter | EP20K200BC356-2XV | EP20K200BC356-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | APEX-20K | — |
| Series | APEX-20K® | — |
| Number of LABs/CLBs | 832 | — |
| Number of Logic Elements / Cells | 8320 | — |
| Total RAM Bits | 106496 | 106496 bits |
| Number of I/O | 277 | — |
| Number of Gates | 526000 | — |
| Core Voltage Supply | 2.375 V to 2.625 V | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 °C to 85 °C (TJ) | — |
| Package / Case | 356-LBGA (Ball Grid Array) | 356-LBGA |
| Speed Grade | -2 | — |
| Configuration Memory | SRAM-based (volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance flag] | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] |
| Product Function | — | APEX-20K Field Programmable Gate Array (FPGA) |
| Logic Family | — | CMOS |
| Equivalent System Gates | — | 200K gates |
| Logic Elements / Cells | — | 8320 |
| Maximum Clock Frequency | — | 250 MHz |
| Core Supply Voltage | — | 2.5 V |
| User I/O Count | — | 277 |
| Number of Pins | — | 356 |
| Package Code | — | LBGA |
| Package Shape | — | Square |
| Process Technology | — | 0.22 um |
| Propagation Delay (tPD) | — | 2.5 ns (from -1N variant listing) |
| Operating Temperature Range | — | 0 to 85 C (commercial, per -1N variant listing) |
| Lead-Free Finish | — | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] |