EP20K200BC356-2XV vs EP20K200BC356-1 比較
詳細並排比較 EP20K200BC356-2XV 由 Altera 與 EP20K200BC356-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K200BC356-2XV - APEX-20K FPGA, 8320 LE, 356-BGA | Altera/Intel
EP20K200BC356-2XV Obsolete規格比較
| 參數 | EP20K200BC356-2XV | EP20K200BC356-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX-20K | — |
| Series | APEX-20K® | — |
| Number of LABs/CLBs | 832 | — |
| Number of Logic Elements / Cells | 8320 | — |
| Total RAM Bits | 106496 | 106496 bits |
| Number of I/O | 277 | — |
| Number of Gates | 526000 | — |
| Core Voltage Supply | 2.375 V to 2.625 V | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 °C to 85 °C (TJ) | — |
| 封裝 / 外殼 | 356-LBGA (Ball Grid Array) | 356-LBGA |
| Speed Grade | -2 | — |
| Configuration Memory | SRAM-based (volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance flag] | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] |
| Product Function | — | APEX-20K Field Programmable Gate Array (FPGA) |
| Logic Family | — | CMOS |
| Equivalent System Gates | — | 200K gates |
| Logic Elements / Cells | — | 8320 |
| 最大時脈頻率 | — | 250 MHz |
| Core Supply Voltage | — | 2.5 V |
| User I/O Count | — | 277 |
| 腳位數 | — | 356 |
| Package Code | — | LBGA |
| Package Shape | — | Square |
| Process Technology | — | 0.22 um |
| Propagation Delay (tPD) | — | 2.5 ns (from -1N variant listing) |
| 工作溫度範圍 | — | 0 to 85 C (commercial, per -1N variant listing) |
| Lead-Free Finish | — | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] |