EP20K400EFC672-3 vs EP20K400FC672-3 Comparison
Detailed side-by-side comparison of EP20K400EFC672-3 by Intel and EP20K400FC672-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400EFC672-3 | EP20K400FC672-3 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Product Type | FPGA (Field Programmable Gate Array) | — |
| Series | APEX-20KE | — |
| Logic Elements | 16,640 (approx. 1,052,000 system gates) | — |
| Embedded Memory (bits) | 212,992 | — |
| User I/Os | 488 | — |
| Maximum User I/O | 488 pins | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V (multi-voltage I/O) | — |
| Speed Grade | -3 (fastest commercial) | -3 (commercial fastest) |
| Operating Temperature | 0 C to +85 C (commercial) | 0 °C to 85 °C |
| Package | 672-ball FineLine BGA | 672-pin FC-FBGA |
| Mounting Type | Surface Mount | Surface Mount |
| Logic Family | CMOS | CMOS, SRAM-based |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | APEX 20K |
| Device Logic Elements | — | 16,640 cells |
| Typical Gate Count | — | 400,000 system gates |
| Maximum User I/Os | — | 502 |
| Internal Performance | — | 167 MHz |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 2.5 V |
| Package Code | — | BGA |
| Number of Terminals | — | 672 |
| Terminal Form | — | Ball (BGA) |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |
| Programming Method | — | SRAM, JTAG (ByteBlaster) |
| Lifecycle Status | — | Obsolete / Legacy |