EP20K400EFC672-3 vs EP20K400FC672-3 Comparaison
Comparaison détaillée côte à côte de EP20K400EFC672-3 par Intel et EP20K400FC672-3 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400EFC672-3 | EP20K400FC672-3 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $199,50 | $138,00 |
| Product Type | FPGA (Field Programmable Gate Array) | — |
| Series | APEX-20KE | — |
| Logic Elements | 16,640 (approx. 1,052,000 system gates) | — |
| Embedded Memory (bits) | 212,992 | — |
| User I/Os | 488 | — |
| Maximum User I/O | 488 pins | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V (multi-voltage I/O) | — |
| Speed Grade | -3 (fastest commercial) | -3 (commercial fastest) |
| Température de fonctionnement | 0 C to +85 C (commercial) | 0 °C to 85 °C |
| Boîtier | 672-ball FineLine BGA | 672-pin FC-FBGA |
| Type de montage | Surface Mount | Surface Mount |
| Logic Family | CMOS | CMOS, SRAM-based |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | APEX 20K |
| Device Logic Elements | — | 16,640 cells |
| Typical Gate Count | — | 400,000 system gates |
| Maximum User I/Os | — | 502 |
| Internal Performance | — | 167 MHz |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 2.5 V |
| Package Code | — | BGA |
| Number of Terminals | — | 672 |
| Terminal Form | — | Ball (BGA) |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |
| Programming Method | — | SRAM, JTAG (ByteBlaster) |
| Statut du cycle de vie | — | Obsolete / Legacy |