EP20K400FC672-3X vs EP20K400FC672-3V Comparison
Detailed side-by-side comparison of EP20K400FC672-3X by Altera and EP20K400FC672-3V by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera
EP20K400FC672-3X β Last Time Buy
Specification Comparison
| Parameter | EP20K400FC672-3X | EP20K400FC672-3V |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $152.40 | $152.00 |
| Logic Family | APEX 20K | β |
| Device Sub-family | EP20K400 | β |
| Technology | CMOS 0.22 Β΅m | β |
| Number of Gates | 400,000 (typical) | β |
| Logic Cells | 16,640 | β |
| Macros / Macrocells | 1664 | β |
| User I/Os | 502 | β |
| Dedicated I/O Lines | 496 | β |
| Core Supply Voltage | 2.5 V | β |
| Maximum Clock Frequency | 181.82 MHz | β |
| Typical Propagation Delay | 2.07 ns | β |
| Operating Temperature | 0 Β°C to 85 Β°C (commercial) | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -3X | -3 |
| Package | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) | β |
| Architecture | MultiCore (LUT + embedded CAM/RAM) | β |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Family | β | APEX 20KC |
| Series | β | APEX-20KC |
| Device Type | β | FPGA (Field Programmable Gate Array) |
| Logic Elements / Cells | β | 16640 |
| System Gates | β | 400000 |
| Total RAM Bits | β | 212992 |
| Number of I/O | β | 502 |
| Number of LABs/CLBs | β | 1664 |
| Number of Logic Elements | β | 16640 |
| Supply Voltage (Core) | β | 1.71 V to 1.89 V |
| Package / Case | β | 672-BBGA, FCBGA |
| Supplier Device Package | β | 672-FBGA (27x27) |
| Process Technology | β | 0.22 Β΅m |
| Maximum Internal Frequency | β | 167 MHz (typical) |
| Pin-to-Pin Delay | β | 3.6 ns |
| Programmability Type | β | In-system (JTAG IEEE 1149.1) |