EP20K400FC672-3X vs EP20K400FC672-3V Comparison
Detailed side-by-side comparison of EP20K400FC672-3X by Altera and EP20K400FC672-3V by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera
EP20K400FC672-3X ⚠ Last Time Buy
Specification Comparison
| Parameter | EP20K400FC672-3X | EP20K400FC672-3V |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Obsolete |
| Logic Family | APEX 20K | — |
| Device Sub-family | EP20K400 | — |
| Technology | CMOS 0.22 µm | — |
| Number of Gates | 400,000 (typical) | — |
| Logic Cells | 16,640 | — |
| Macros / Macrocells | 1664 | — |
| User I/Os | 502 | — |
| Dedicated I/O Lines | 496 | — |
| Core Supply Voltage | 2.5 V | — |
| Maximum Clock Frequency | 181.82 MHz | — |
| Typical Propagation Delay | 2.07 ns | — |
| Operating Temperature | 0 °C to 85 °C (commercial) | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -3X | -3 |
| Package | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) | — |
| Architecture | MultiCore (LUT + embedded CAM/RAM) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster | — |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Family | — | APEX 20KC |
| Series | — | APEX-20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements / Cells | — | 16640 |
| System Gates | — | 400000 |
| Total RAM Bits | — | 212992 |
| Number of I/O | — | 502 |
| Number of LABs/CLBs | — | 1664 |
| Number of Logic Elements | — | 16640 |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V |
| Package / Case | — | 672-BBGA, FCBGA |
| Supplier Device Package | — | 672-FBGA (27x27) |
| Process Technology | — | 0.22 µm |
| Maximum Internal Frequency | — | 167 MHz (typical) |
| Pin-to-Pin Delay | — | 3.6 ns |
| Programmability Type | — | In-system (JTAG IEEE 1149.1) |