EP20K400FI672-1XN vs EP20K400FI672-1 Comparison
Detailed side-by-side comparison of EP20K400FI672-1XN by Intel and EP20K400FI672-1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FI672-1XN | EP20K400FI672-1 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $171.00 | $92.00 |
| Family | APEX 20K | β |
| Device | EP20K400 | β |
| Typical Gates | 400,000 | 400,000 |
| Logic Elements | 16,640 | 212,992 |
| Maximum User I/O Pins | 488 | β |
| Embedded System Memory | 212 Kbit | β |
| Number of PLLs | 4 | β |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | β |
| I/O Supply Voltage | 2.5 V / 3.3 V | β |
| Process Technology | 0.18 micrometer CMOS | CMOS |
| Package | 672-ball FineLine BGA (FI672) | 672-ball PBGA (FineLine BGA, 1.0 mm pitch) |
| Package Size | 27 mm x 27 mm | β |
| Operating Temperature | -40 C to +85 C (industrial) | Industrial (per 'I' suffix) |
| Configuration Method | SRAM, JTAG, EPC serial PROM | β |
| JTAG Support | IEEE 1149.1 boundary-scan compliant | β |
| Speed Grade | -1 | -1 |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| MSL Level | 3 | 3 |
| Series | β | APEX 20K |
| Device Family | β | APEX-20K Field Programmable Gate Array |
| Logic Array Blocks (LABs) | β | 16,640 |
| User I/O Pins | β | 502 |
| Dedicated Inputs | β | 4 |
| Total Terminals | β | 672 |
| Package Code (JEDEC) | β | S-PBGA-B672 |
| Core Supply Voltage (VCCINT) | β | 2.5 V nominal (2.375 V to 2.625 V) |
| Propagation Delay | β | 2.5 ns |
| Peak Reflow Temperature | β | 220 C |