EP20K600CF33C7 vs EP20K600CF33C8N Comparison
Detailed side-by-side comparison of EP20K600CF33C7 by Altera and EP20K600CF33C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF33C7 | EP20K600CF33C8N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $105.40 | $162.75 |
| Series | APEX-20K | β |
| Family | APEX-20K Field Programmable Gate Array | APEX 20KC |
| Typical Gate Count | 600,000 gates | β |
| Logic Elements | 24,320 | β |
| Embedded RAM Bits | 311,296 bits | β |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | β |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | β |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | β |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | β |
| Operating Temperature Range | -40C to +85C (Industrial) | β |
| Package | 1020-BBGA / FCBGA (33x33 mm) | 1020-pin FC-FBGA (flip-chip) |
| Package Code | BGA, 1020 balls | β |
| Speed Grade | C7 (7 ns) | -8 (slower than -7) |
| Terminal Form | Ball | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (N suffix) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Configuration Memory | SRAM (volatile, requires external config device) | β |
| Logic Elements / Cells | β | 24,320 |
| Total RAM Bits | β | 311,296 |
| Number of LABs / CLBs | β | 2,432 |
| Number of Gates | β | 1,537,000 (max) |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Core Voltage Supply | β | 1.71 V to 1.89 V (1.8 V nominal) |
| Technology / Process | β | 0.15 Β΅m CMOS |
| Maximum Internal Frequency | β | 301.21 MHz |
| Operating Temperature | β | 0Β°C to 85Β°C (TJ) |
| Pitch | β | 0.33 mm |
| Programmable Type | β | In-System / SRAM-based |
| Configuration Interface | β | JTAG (IEEE 1149.1) + Passive Serial / Parallel |