EP20K600CF33C7 vs EP20K600CF33C8N Vergleich
Detaillierter Direktvergleich von EP20K600CF33C7 von Altera und EP20K600CF33C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CF33C7 | EP20K600CF33C8N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $105,40 | $162,75 |
| Series | APEX-20K | — |
| Family | APEX-20K Field Programmable Gate Array | APEX 20KC |
| Typical Gate Count | 600,000 gates | — |
| Logic Elements | 24,320 | — |
| Embedded RAM Bits | 311,296 bits | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Betriebstemperaturbereich | -40C to +85C (Industrial) | — |
| Gehäuse | 1020-BBGA / FCBGA (33x33 mm) | 1020-pin FC-FBGA (flip-chip) |
| Package Code | BGA, 1020 balls | — |
| Speed Grade | C7 (7 ns) | -8 (slower than -7) |
| Terminal Form | Ball | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant (N suffix) |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Configuration Memory | SRAM (volatile, requires external config device) | — |
| Logic Elements / Cells | — | 24,320 |
| Total RAM Bits | — | 311,296 |
| Number of LABs / CLBs | — | 2,432 |
| Number of Gates | — | 1,537,000 (max) |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage Supply | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Technology / Process | — | 0.15 µm CMOS |
| Maximum Internal Frequency | — | 301.21 MHz |
| Betriebstemperatur | — | 0°C to 85°C (TJ) |
| Pitch | — | 0.33 mm |
| Programmable Type | — | In-System / SRAM-based |
| Configuration Interface | — | JTAG (IEEE 1149.1) + Passive Serial / Parallel |