EP20K600CF672-1X vs EP20K600CF672-2 Comparison

Detailed side-by-side comparison of EP20K600CF672-1X by Intel and EP20K600CF672-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672-1X EP20K600CF672-2
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Series APEX 20KC APEX 20KC
Device Family APEX 20KC MultiCore FPGA APEX 20KC PLD
Maximum Typical Gates 600,000 —
Logic Elements 31,104 (per Altera APEX 20KC datasheet family) 30,720
Embedded System Blocks (ESBs) up to 256 —
Embedded Memory (max bits) [DATA_NEEDED: ESB RAM bits] —
PLLs 4 —
Maximum User I/O [DATA_NEEDED: max user I/O count] —
Package 672-ball BGA (CF672), 1.27 mm pitch —
Speed Grade -1 (industrial speed grade, X = lead-free) -2
Process Technology 0.18 um SRAM CMOS 0.18 um CMOS
Configuration Method SRAM, JTAG (IEEE 1149.1), EPC passive serial —
Supply Voltage [DATA_NEEDED: VCCINT/VCCIO] —
Operating Temperature [DATA_NEEDED: industrial temp range] 0 C to +60 C (TJ, per Alibaba supplier listing)
Mounting Type Surface Mount (BGA) Surface Mount
MSL Level [DATA_NEEDED: MSL rating] —
RoHS Status Compliant (per Alibaba distributor listing: "RoHS Compliant") [DATA_NEEDED: rohs_status]
Manufacturer — Intel / Altera
Gate Count (typical) — 600,000 gates
Embedded RAM (approx.) — 311,232 bits
Package Type — 672-ball FineLine BGA (FCBGA)
Configuration Mode — Enhanced Configuration (EPC)
Number of PLLs — 4
I/O Standards — LVTTL, LVCMOS, and others per datasheet
Boundary Scan — IEEE 1149.1 (JTAG)
Lifecycle Status — Obsolete / last-time-buy

Datasheets & Resources

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