EP20K600CF672-2X vs EP20K600CF672-1X Comparison

Detailed side-by-side comparison of EP20K600CF672-2X by Altera and EP20K600CF672-1X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672-2X EP20K600CF672-1X
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete NRND
Family APEX 20KC —
Maximum Logic Elements 24,320 —
Typical Gates 600,000 —
Maximum User I/O Pins 508 —
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] up to 256
Maximum Embedded RAM 311,296 bits —
Speed Grade -2 -1 (industrial speed grade, X = lead-free)
Package 672-ball FineLine BGA (CF672) 672-ball BGA (CF672), 1.27 mm pitch
Operating Voltage (Core) [DATA_NEEDED: VCCINT] —
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS —
Configuration Mode EPC (Enhanced Configuration) devices —
Operating Temperature [DATA_NEEDED: temperature grade] [DATA_NEEDED: industrial temp range]
Process Technology 0.18 um CMOS 0.18 um SRAM CMOS
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
MSL Level [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL rating]
RoHS Status [DATA_NEEDED: RoHS status] Compliant (per Alibaba distributor listing: "RoHS Compliant")
Series — APEX 20KC
Device Family — APEX 20KC MultiCore FPGA
Maximum Typical Gates — 600,000
Logic Elements — 31,104 (per Altera APEX 20KC datasheet family)
Embedded Memory (max bits) — [DATA_NEEDED: ESB RAM bits]
PLLs — 4
Maximum User I/O — [DATA_NEEDED: max user I/O count]
Configuration Method — SRAM, JTAG (IEEE 1149.1), EPC passive serial
Supply Voltage — [DATA_NEEDED: VCCINT/VCCIO]

Datasheets & Resources

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