EP20K600CF672-2X vs EP20K600CF672-1X 比較

詳細並排比較 EP20K600CF672-2X 由 Altera 與 EP20K600CF672-1X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF672-2X EP20K600CF672-1X
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Family APEX 20KC —
Maximum Logic Elements 24,320 —
Typical Gates 600,000 —
Maximum User I/O Pins 508 —
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] up to 256
Maximum Embedded RAM 311,296 bits —
Speed Grade -2 -1 (industrial speed grade, X = lead-free)
封裝 672-ball FineLine BGA (CF672) 672-ball BGA (CF672), 1.27 mm pitch
Operating Voltage (Core) [DATA_NEEDED: VCCINT] —
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS —
Configuration Mode EPC (Enhanced Configuration) devices —
工作溫度 [DATA_NEEDED: temperature grade] [DATA_NEEDED: industrial temp range]
Process Technology 0.18 um CMOS 0.18 um SRAM CMOS
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
MSL 等級 [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL rating]
RoHS 狀態 [DATA_NEEDED: RoHS status] Compliant (per Alibaba distributor listing: "RoHS Compliant")
Series — APEX 20KC
Device Family — APEX 20KC MultiCore FPGA
Maximum Typical Gates — 600,000
Logic Elements — 31,104 (per Altera APEX 20KC datasheet family)
Embedded Memory (max bits) — [DATA_NEEDED: ESB RAM bits]
PLLs — 4
Maximum User I/O — [DATA_NEEDED: max user I/O count]
Configuration Method — SRAM, JTAG (IEEE 1149.1), EPC passive serial
供應電壓 — [DATA_NEEDED: VCCINT/VCCIO]

資料表與資源

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