EP20K600CF672C7N vs EP20K600CF672I-8ES Comparison

Detailed side-by-side comparison of EP20K600CF672C7N by Altera and EP20K600CF672I-8ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672C7N EP20K600CF672I-8ES
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Family APEX 20KC —
Maximum System Gates 1,052,000 —
Typical Gates 600,000 600,000 (ASIC-equivalent)
Logic Elements / Cells 24,320 —
Maximum User I/O Pins 488 508
Total Package Pins 652 —
Package FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch 672-ball BGA (FineLine BGA, 1.27 mm pitch)
Core Voltage 1.8 V 1.8 V
Maximum Operating Frequency 375.94 MHz —
Propagation Delay 1.48 ns —
Process Technology 0.15 µm all-layer copper-metal CMOS 0.18 micron CMOS SRAM
Architecture MultiCore (LUT + Embedded System Memory) —
Operating Temperature 0 °C to +85 °C (Commercial) -40C to +100C (Industrial)
Speed Grade C7 -8 (slower)
Seated Height 3.50 mm —
Mounting Type Surface Mount (BGA) —
RoHS Status unknown Non-compliant (legacy Altera leaded BGA process)
Family — APEX 20KC
Logic Elements — 24,320
Embedded Memory Bits — 311,296
Embedded PLLs — 4
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+
Configuration Modes — Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG
In-System Programmability — Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1)
MSL Level — [DATA_NEEDED: moisture sensitivity level]

Datasheets & Resources

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