EP20K600CF672I-8ES vs EP20K600CF672I8 Comparison

Detailed side-by-side comparison of EP20K600CF672I-8ES by Altera and EP20K600CF672I8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672I-8ES EP20K600CF672I8
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $119.00 $195.00
Family APEX 20KC APEX 20KC
Logic Elements 24,320 β€”
Typical Gates 600,000 (ASIC-equivalent) β€”
Embedded Memory Bits 311,296 β€”
Maximum User I/O Pins 508 β€”
Embedded PLLs 4 β€”
Core Voltage 1.8 V β€”
I/O Standards Supported LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ β€”
Process Technology 0.18 micron CMOS SRAM 0.15 Β΅m all-layer copper
Speed Grade -8 (slower) β€”
Operating Temperature -40C to +100C (Industrial) 0 Β°C to +85 Β°C (Industrial)
Package 672-ball BGA (FineLine BGA, 1.27 mm pitch) β€”
Configuration Modes Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG β€”
In-System Programmability Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1) β€”
RoHS Status Non-compliant (legacy Altera leaded BGA process) Compliant per legacy product records
MSL Level [DATA_NEEDED: moisture sensitivity level] β€”
Device Type β€” SPLD / FPGA
Logic Elements / Cells β€” 24,320
Macros (Logic Cells) β€” 2432
Typical Gate Count β€” 600,000 gates
Embedded Memory β€” 311,296 bits
User I/Os β€” 488 to 508
Number of Pins β€” 652 (functional) / 672 (BGA balls)
Propagation Delay (typical) β€” 1.48 ns
Internal Frequency (max) β€” [DATA_NEEDED: max internal frequency in MHz]
Core Supply Voltage β€” 1.8 V
Package Type β€” 672-ball BGA, 45 x 45 mm, 1.27 mm pitch
Mounting Type β€” Surface Mount
Configuration Interface β€” JTAG / Passive Serial
Design Tool β€” Quartus II (legacy MAX+PLUS II)

Datasheets & Resources

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