EP20K600EBC652-3 vs EP2A15B652C7 Comparison
Detailed side-by-side comparison of EP20K600EBC652-3 by Intel and EP2A15B652C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600EBC652-3 | EP2A15B652C7 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $340.00 | $82.40 |
| Series | APEX-20KE | β |
| Family | APEX 20K | APEX II |
| Device Type | FPGA (Field Programmable Gate Array) / SPLD Loadable | β |
| Logic Elements | 24320 | 30000 (approx) |
| Embedded Memory | 311296 bits | β |
| User I/Os | 488 | β |
| Number of Terminals | 652 | β |
| Package Type | BGA-652 (45 x 45 mm, 1.27 mm pitch) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Propagation Delay | 1.48 ns | β |
| Operating Temperature | 0 C to 85 C | 0C to +85C (commercial, suffix C7) |
| Speed Grade | -3 | -7 |
| Process Technology | 0.15-micron all-layer copper CMOS | 0.18 micron CMOS |
| Core Voltage | [DATA_NEEDED: core voltage] | β |
| I/O Voltage Support | Multi-volt 3.3 V / 2.5 V / 1.8 V | β |
| Configuration Method | JTAG / serial / passive parallel | SRAM-based, requires external configuration memory |
| PLLs | 4 | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - legacy APEX II family] |
| Lead-Free | [DATA_NEEDED: lead-free] | β |
| Typical Gates | β | 1.5 million |
| Maximum User I/O Pins | β | [DATA_NEEDED: exact user I/O count] |
| Embedded System Blocks (ESB) | β | Yes - configurable as RAM/ROM or product-term logic |
| Supply Voltage - Core | β | [DATA_NEEDED: VCCINT voltage] |
| Supply Voltage - I/O | β | [DATA_NEEDED: VCCIO voltage] |
| Package | β | 652-ball BGA |
| Hot Socketing Support | β | Yes (MultiCore hot-socketing) |
| Design Tool | β | Quartus II (legacy) |