EP20K600EFC672-3 vs EP20K600EFC672-1XN Comparison
Detailed side-by-side comparison of EP20K600EFC672-3 by Intel and EP20K600EFC672-1XN by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K600EFC672-3 - APEX 20KE 600K Gate FPGA | Intel | 672-BGA
EP20K600EFC672-3 ⚠ Last Time BuySpecification Comparison
| Parameter | EP20K600EFC672-3 | EP20K600EFC672-1XN |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Obsolete |
| Family | APEX 20KE | APEX 20K (APEX-20KE) |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Maximum System Gates | 600,000 | — |
| Logic Elements | 24,320 | 24,320 |
| Embedded Memory Bits | 311,296 bits | — |
| Maximum User I/Os | 488 | — |
| Package | 672-pin FineLine BGA (FC-FBGA), 27 x 27 mm | 672-ball FineLine BGA (FBGA) |
| Operating Temperature | 0 °C to +85 °C (commercial) | 0C to 85C (commercial) |
| Core Supply Voltage | 1.71 V to 1.89 V | — |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.18 micron CMOS |
| Maximum Operating Frequency | 182 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Speed Grade | -3 | -1 (fastest) |
| Programmable Interface | IEEE 1149.1 JTAG, in-system programmable | — |
| RoHS Status | Compliant (ROHS3 per distributor data) | [DATA_NEEDED: RoHS status] |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| System Gates | — | 1,560,000 (typical 600K) |
| Typical Logic Elements | — | 311,296 |
| Macros (Logic Array Blocks) | — | 2,432 |
| User I/O Pins | — | 508 |
| Total RAM Bits | — | [DATA_NEEDED: total RAM bits] |
| Ball Pitch | — | 1.0 mm |
| Supply Voltage (Core) | — | 1.8 V typical |
| Configuration Method | — | Serial or parallel, JTAG |
| MSL Level | — | [DATA_NEEDED: MSL level] |