EP20K600EFC672-3 vs EP20K600EFC672-1XN 对比
详细并排对比 EP20K600EFC672-3 出自 Intel 和 EP20K600EFC672-1XN 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K600EFC672-3 | EP20K600EFC672-1XN |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $355.00 | $285.00 |
| Family | APEX 20KE | APEX 20K (APEX-20KE) |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Maximum System Gates | 600,000 | — |
| Logic Elements | 24,320 | 24,320 |
| Embedded Memory Bits | 311,296 bits | — |
| Maximum User I/Os | 488 | — |
| 封装 | 672-pin FineLine BGA (FC-FBGA), 27 x 27 mm | 672-ball FineLine BGA (FBGA) |
| 工作温度 | 0 °C to +85 °C (commercial) | 0C to 85C (commercial) |
| Core Supply Voltage | 1.71 V to 1.89 V | — |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.18 micron CMOS |
| Maximum Operating Frequency | 182 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Speed Grade | -3 | -1 (fastest) |
| Programmable Interface | IEEE 1149.1 JTAG, in-system programmable | — |
| RoHS 状态 | Compliant (ROHS3 per distributor data) | [DATA_NEEDED: RoHS status] |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| System Gates | — | 1,560,000 (typical 600K) |
| Typical Logic Elements | — | 311,296 |
| Macros (Logic Array Blocks) | — | 2,432 |
| User I/O Pins | — | 508 |
| Total RAM Bits | — | [DATA_NEEDED: total RAM bits] |
| Ball Pitch | — | 1.0 mm |
| Supply Voltage (Core) | — | 1.8 V typical |
| Configuration Method | — | Serial or parallel, JTAG |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |