EP20K60EFC144-2 vs EP20K60EFC144-2X Comparison
Detailed side-by-side comparison of EP20K60EFC144-2 by Altera and EP20K60EFC144-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K60EFC144-2 | EP20K60EFC144-2X |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.75 | $42.65 |
| Series | APEX-20K | β |
| Family | APEX-20KE (Enhanced, 1.8 V core) | APEX-20KE |
| Typical Gates | 60,000 | 60,000 |
| Logic Elements | 2,560 | 2,560 |
| Total RAM Bits | 32,768 | β |
| User I/O | 92 to 93 | β |
| Core Supply Voltage | 1.71 V to 1.89 V | β |
| Internal Frequency (max) | 160 MHz | β |
| Propagation Delay | 1.72 ns | β |
| Process Technology | 0.18 Β΅m CMOS | 0.22 Β΅m CMOS |
| Package | 144-LQFP (also referenced as 144-FBGA 13x13 in some sources) | 144-pin FBGA (13x13 mm) |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0 Β°C to +85 Β°C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| JTAG Support | IEEE 1149.1 boundary scan | β |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL+ | β |
| Configuration Method | Serial/Parallel passive, JTAG, EPC companion | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Unknown (legacy part - check distributor) |
| Embedded RAM Bits | β | 32,768 |
| User I/Os | β | 93 |
| Number of PLLs | β | 4 |
| Core Voltage | β | 1.8 V (1.71 V β 1.89 V) |
| Configuration | β | SRAM-based, JTAG (IEEE 1149.1) |
| Speed Grade | β | -2 (faster commercial) |
| Tool Support | β | Quartus II, MAX+PLUS II |