EP20K60EFC144-2 vs EP20K60EFC144-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K60EFC144-2 sa pamamagitan ng Altera at EP20K60EFC144-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K60EFC144-2 | EP20K60EFC144-2X |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20K | — |
| Family | APEX-20KE (Enhanced, 1.8 V core) | APEX-20KE |
| Typical Gates | 60,000 | 60,000 |
| Logic Elements | 2,560 | 2,560 |
| Total RAM Bits | 32,768 | — |
| User I/O | 92 to 93 | — |
| Core Supply Voltage | 1.71 V to 1.89 V | — |
| Internal Frequency (max) | 160 MHz | — |
| Propagation Delay | 1.72 ns | — |
| Process Technology | 0.18 µm CMOS | 0.22 µm CMOS |
| Packhaging | 144-LQFP (also referenced as 144-FBGA 13x13 in some sources) | 144-pin FBGA (13x13 mm) |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL+ | — |
| Configuration Method | Serial/Parallel passive, JTAG, EPC companion | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Unknown (legacy part - check distributor) |
| Embedded RAM Bits | — | 32,768 |
| User I/Os | — | 93 |
| Number of PLLs | — | 4 |
| Core Voltage | — | 1.8 V (1.71 V – 1.89 V) |
| Configuration | — | SRAM-based, JTAG (IEEE 1149.1) |
| Speed Grade | — | -2 (faster commercial) |
| Tool Support | — | Quartus II, MAX+PLUS II |