EP2A25F672C9 vs EP2A25F672I8 Comparison

Detailed side-by-side comparison of EP2A25F672C9 by Altera and EP2A25F672I8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A25F672C9 EP2A25F672I8
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $700.00 $125.00
Family APEX II APEX II
Logic Elements (LE) Approximately 25,000 β€”
Macro Cells 2432 β€”
User I/O 492 β€”
Package 672-ball FCBGA (FineLine BGA) 672-ball FC-FBGA (FineLine BGA), 27 Γ— 27 mm, 1 mm pitch
Package Dimensions 27 mm x 27 mm β€”
Ball Pitch 1.0 mm β€”
Process Technology 0.15 Β΅m all-layer copper, up to 8 metal layers 0.15 Β΅m CMOS, up to 8 metal layers
Logic Family CMOS β€”
Propagation Delay 1.69 ns 1.69 ns (typical)
Operating Temperature 0Β°C to 85Β°C (Commercial) –40 Β°C to +85 Β°C (industrial, 'I' grade)
Supply Voltage [DATA_NEEDED: core VCC voltage] β€”
I/O Standards LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) β€”
Configuration Passive Serial, Passive Parallel Synchronous, JTAG β€”
Embedded Memory ESBs for dual-port RAM, ROM, FIFO β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status [DATA_NEEDED] unknown
Logic Elements / Cells β€” 24,320
Equivalent Gates β€” 900,000
Embedded Memory (RAM bits) β€” 622,592
User I/Os β€” 492
Number of PLLs β€” 4
Core Supply Voltage β€” 1.5 V
Internal Performance β€” 333 MHz (per legacy datasheet)
LVDS / High-Speed I/O β€” Yes, up to 1 Gbps
Speed Grade β€” I8 (industrial, 8-speed-grade per APEX II ordering scheme)
JTAG / Boundary Scan β€” IEEE 1149.1 compliant
I/O Standards Supported β€” LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, GTL+, PCI
Lead-Free Status β€” unknown

Datasheets & Resources

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