EP2A40B724C9N vs EP2A40B724I-9 Comparison
Detailed side-by-side comparison of EP2A40B724C9N by Altera and EP2A40B724I-9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A40B724C9N | EP2A40B724I-9 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| System Gates | 1,500,000 | — |
| Logic Elements / Cells | 38,400 | — |
| Maximum Frequency | 366 MHz | — |
| Propagation Delay | 2.05 ns | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| User I/O Count | 536 | — |
| Package | 724-ball FCBGA (Fine-pitch Chip-Scale BGA) | 724-ball FCBGA / FineLine BGA |
| Terminal Pitch | 1.270 mm | — |
| Number of Terminals | 724 | — |
| Terminal Form | Ball | — |
| Output Function | Macrocells | — |
| Operating Temperature Grade | Industrial (OTHER / per datasheet) | — |
| Mounting Type | Surface Mount | — |
| Logic Elements | — | 40,000 (typical) |
| Logic Cells | — | 38400 |
| Embedded Memory Bits | — | 655360 |
| Maximum User I/O | — | 540 (per EP2A40B724 family) |
| Package Code | — | B724 |
| Temperature Grade | — | Industrial ('I' suffix) |
| Operating Junction Temperature | — | -40 C to +100 C (industrial) |
| Speed Grade | — | -9 (per APEX II speed bin) |
| Peak Reflow Temperature | — | 220 C |
| Core Voltage | — | 1.5 V (typical APEX II) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL |
| Configuration Interface | — | JTAG, Passive Serial |
| PLL | — | On-chip (per APEX II architecture) |
| RoHS Status | — | [DATA_NEEDED: rohs status] |
| MSL Level | — | [DATA_NEEDED: msl level] |