EP2A40B724C9N vs EP2A40B724I-9 比較
詳細並排比較 EP2A40B724C9N 由 Altera 與 EP2A40B724I-9 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A40B724C9N | EP2A40B724I-9 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| System Gates | 1,500,000 | — |
| Logic Elements / Cells | 38,400 | — |
| Maximum Frequency | 366 MHz | — |
| Propagation Delay | 2.05 ns | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| User I/O Count | 536 | — |
| 封裝 | 724-ball FCBGA (Fine-pitch Chip-Scale BGA) | 724-ball FCBGA / FineLine BGA |
| Terminal Pitch | 1.270 mm | — |
| Number of Terminals | 724 | — |
| Terminal Form | Ball | — |
| Output Function | Macrocells | — |
| Operating Temperature Grade | Industrial (OTHER / per datasheet) | — |
| 安裝類型 | Surface Mount | — |
| Logic Elements | — | 40,000 (typical) |
| Logic Cells | — | 38400 |
| Embedded Memory Bits | — | 655360 |
| Maximum User I/O | — | 540 (per EP2A40B724 family) |
| Package Code | — | B724 |
| Temperature Grade | — | Industrial ('I' suffix) |
| 工作接面溫度 | — | -40 C to +100 C (industrial) |
| Speed Grade | — | -9 (per APEX II speed bin) |
| Peak Reflow Temperature | — | 220 C |
| Core Voltage | — | 1.5 V (typical APEX II) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL |
| Configuration Interface | — | JTAG, Passive Serial |
| PLL | — | On-chip (per APEX II architecture) |
| RoHS 狀態 | — | [DATA_NEEDED: rohs status] |
| MSL 等級 | — | [DATA_NEEDED: msl level] |