EP2AGX125EF35C6G vs EP2AGX125EF35C4G Comparison
Detailed side-by-side comparison of EP2AGX125EF35C6G by Altera and EP2AGX125EF35C4G by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2AGX125EF35C4G - Arria II GX FPGA, 118K LEs, 1152-FCBGA | Intel
EP2AGX125EF35C4G β Last Time BuySpecification Comparison
| Parameter | EP2AGX125EF35C6G | EP2AGX125EF35C4G |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Unknown | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $1,290.00 |
| Product Type | Field Programmable Gate Array (FPGA) | β |
| Series | Arria II GX | β |
| Number of Logic Elements/Cells | 118143 | β |
| Total RAM Bits | 8315904 bit | β |
| User I/O Pins | 452 | β |
| Core Supply Voltage | 0.87 V to 0.93 V | β |
| Number of LABs | [DATA_NEEDED: number of LABs] | β |
| Operating Temperature | 0 Β°C to 85 Β°C (Tj) | 0C to +85C (Commercial) |
| Package Type | 1152-BBGA, FCBGA | β |
| Supplier Device Package | 1152-FBGA (35 mm x 35 mm) | β |
| Package Pin Count | 1152 pin | β |
| Mounting Type | [DATA_NEEDED: mounting type] | Surface Mount |
| Maximum Operating Frequency | [DATA_NEEDED: maximum operating frequency] | β |
| Transceiver Count | [DATA_NEEDED: transceiver count] | β |
| Configuration Method | [DATA_NEEDED: configuration method] | SRAM-based, PS/FPP/JTAG |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | β |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | β |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | β |
| Halogen-Free Status | [DATA_NEEDED: halogen-free status] | β |
| Family | β | Arria II GX |
| Logic Elements | β | 118,143 |
| Embedded Memory Bits | β | 8,315,904 |
| Memory Blocks (M9K) | β | [DATA_NEEDED: M9K count] |
| Hardware Multipliers (18x18) | β | 452 |
| DSP Blocks | β | [DATA_NEEDED: DSP block count] |
| Transceiver Channels | β | 12 |
| Maximum Transceiver Data Rate | β | 6.375 Gbps |
| PCI Express Hard IP | β | Gen1/Gen2 x1/x4/x8 |
| Core Voltage | β | 0.9 V |
| User I/O Banks | β | [DATA_NEEDED: I/O bank count] |
| Maximum User I/O | β | [DATA_NEEDED: max user I/O count] |
| Process Technology | β | 40 nm |
| Package | β | 1152-ball FC-FBGA (Flip-Chip) |
| Speed Grade | β | C4 |
| Lead-Free | β | Yes |