EP2S15F672C4 vs EP2S60F672C5 Comparison
Detailed side-by-side comparison of EP2S15F672C4 by Altera and EP2S60F672C5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S15F672C4 | EP2S60F672C5 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $235.00 | $410.85 |
| Family | Stratix II | Stratix II |
| Logic Elements | 15,600 | 60,440 |
| Embedded Memory Bits | 419,328 bits | β |
| DSP Blocks | 156 (approximate, per Stratix II family) | 12 (dedicated 18 Γ 18 multipliers) |
| Maximum User I/Os | 366 | 492 |
| Package | 672-ball FineLine BGA (FBGA) | 672-ball FC-FBGA (35 Γ 35 mm, 1 mm pitch) |
| Process Node | 90 nm | β |
| PLLs | 6 | β |
| Operating Temperature | Commercial (0C to +85C, 'C' suffix) | β |
| Speed Grade | 4 | β |
| Configuration Method | Serial / Parallel (passive serial, fast passive parallel, JTAG) | β |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per Stratix II family) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance per Altera product page] | Non-RoHS (legacy product, pre-RoHS production runs) |
| Lead-Free | [DATA_NEEDED: lead-free finish status] | β |
| MSL Level | [DATA_NEEDED: MSL moisture sensitivity level] | β |
| Device Family | β | Stratix II FPGA |
| Configurable Logic Blocks (CLBs) | β | 24,176 |
| Total RAM Bits | β | 2,544,192 bits |
| Operating Frequency | β | Up to 609.76 MHz |
| Core Voltage | β | 1.2 V |
| Process Technology | β | 90 nm CMOS |
| Mounting Type | β | Surface Mount |
| Operating Temperature Grade | β | Commercial (C5 suffix) |
| Operating Temperature Range | β | 0Β°C to +85Β°C |
| Number of PLLs | β | 4 |
| I/O Standards | β | LVDS, LVTTL, SSTL, HSTL, PCI-X |
| Configuration Scheme | β | Fast Passive Parallel, JTAG, Active Serial |