EP2S30F672I4 vs EP2S30F672C4N Comparison
Detailed side-by-side comparison of EP2S30F672I4 by Intel and EP2S30F672C4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S30F672I4 | EP2S30F672C4N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $695.00 | $121.00 |
| Series | Stratix II | Stratix II |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 33880 | 33,880 |
| Logic Array Blocks (LABs) | 1694 | — |
| Total RAM Bits | 1369728 | 1,369,728 |
| Number of I/O | 500 | 500 |
| DSP Blocks | 12 (per datasheet, family range) | — |
| Number of PLLs | 6 | — |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| Operating Temperature | -40C to +100C (Industrial) | 0C to +85C (Commercial, C4 grade) |
| Mounting Type | Surface Mount | Surface Mount |
| Package / Case | 672-BBGA, FCBGA (FBGA-672) | — |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| MSL Level | 3 (per JEDEC J-STD-020) | 3 (168 hours) |
| RoHS Status | [DATA_NEEDED: confirm RoHS compliance on part label] | [DATA_NEEDED: rohs status] |
| Number of LABs/CLBs | — | 1694 |
| Package | — | 672-BBGA, FCBGA (FineLine BGA) |
| Core Voltage | — | 1.2 V |
| Maximum Internal Frequency | — | 711.24 MHz |
| Speed Grade | — | C4 (Commercial, internal performance bin 4) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free / halogen-free status] |
| Embedded Multipliers / DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceivers | — | N/A (Stratix II non-GX variant) |
| Configuration Method | — | Passive serial / Fast passive parallel / JTAG |