EP2S30F672I4 vs EP2S30F672C4N 对比
详细并排对比 EP2S30F672I4 出自 Intel 和 EP2S30F672C4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S30F672I4 | EP2S30F672C4N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $695.00 | $121.00 |
| Series | Stratix II | Stratix II |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 33880 | 33,880 |
| Logic Array Blocks (LABs) | 1694 | — |
| Total RAM Bits | 1369728 | 1,369,728 |
| Number of I/O | 500 | 500 |
| DSP Blocks | 12 (per datasheet, family range) | — |
| Number of PLLs | 6 | — |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| 工作温度 | -40C to +100C (Industrial) | 0C to +85C (Commercial, C4 grade) |
| 安装类型 | Surface Mount | Surface Mount |
| 封装 / 外壳 | 672-BBGA, FCBGA (FBGA-672) | — |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| MSL 等级 | 3 (per JEDEC J-STD-020) | 3 (168 hours) |
| RoHS 状态 | [DATA_NEEDED: confirm RoHS compliance on part label] | [DATA_NEEDED: rohs status] |
| Number of LABs/CLBs | — | 1694 |
| 封装 | — | 672-BBGA, FCBGA (FineLine BGA) |
| Core Voltage | — | 1.2 V |
| Maximum Internal Frequency | — | 711.24 MHz |
| Speed Grade | — | C4 (Commercial, internal performance bin 4) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free / halogen-free status] |
| Embedded Multipliers / DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceivers | — | N/A (Stratix II non-GX variant) |
| Configuration Method | — | Passive serial / Fast passive parallel / JTAG |