EP2SGX30DF780I4NK vs EP2SGX30DF780I4 Comparison
Detailed side-by-side comparison of EP2SGX30DF780I4NK by Intel and EP2SGX30DF780I4 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2SGX30DF780I4 - 33,880 Logic Cells Stratix II GX FPGA | Intel
EP2SGX30DF780I4 β Last Time BuySpecification Comparison
| Parameter | EP2SGX30DF780I4NK | EP2SGX30DF780I4 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $198.50 | $178.25 |
| Series | Stratix II GX | Stratix II GX |
| Logic Elements | 33880 | β |
| Logic Array Blocks (LABs) | 1694 | β |
| Total Memory Bits | 1369728 | β |
| User I/O Count | 361 | 361 |
| Nominal Core Supply Voltage | 1.2 V | β |
| Maximum Internal Clock Frequency | 717 MHz | β |
| Process Technology | 90 nm | 90 nm CMOS |
| Number of PLLs | 4 | β |
| Package | 780-ball FC-FBGA, 29 x 29 mm, 1 mm pitch | 780-ball FC-FBGA, 29x29 mm, 1 mm pitch |
| Package Outline Reference | MS-034AAM-1 | β |
| Temperature Grade | Industrial (-40C to +100C) | β |
| Transceivers | [DATA_NEEDED: number of multi-gigabit transceivers per Stratix II GX ordering code] | β |
| RoHS Status | Lead-free / RoHS compliant (N suffix) | [DATA_NEEDED: RoHS status] |
| Mounting Type | Surface Mount (BGA) | Surface Mount (Flip-chip BGA) |
| Family | β | Stratix II GX |
| Logic Elements / Cells | β | 33,880 |
| Total RAM Bits | β | 1,369,728 |
| Number of LABs | β | 1,694 |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Nominal Supply Voltage (Core) | β | 1.2 V |
| Internal Operating Frequency | β | 622 MHz |
| Maximum Clock Frequency | β | 717 MHz |
| Operating Temperature | β | -40C to +85C (Industrial) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| Number of Transceivers | β | [DATA_NEEDED: number of transceiver channels] |
| Number of PLLs / DLLs | β | [DATA_NEEDED: number of PLLs] |