EP2SGX30DF780I4NK vs EP2SGX30DF780I4 Perbandingan
Perbandingan bersamaan detil EP2SGX30DF780I4NK dari Intel dan EP2SGX30DF780I4 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP2SGX30DF780I4 - 33,880 Logic Cells Stratix II GX FPGA | Intel
EP2SGX30DF780I4 ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP2SGX30DF780I4NK | EP2SGX30DF780I4 |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Waktu Pembelian Terakhir |
| Series | Stratix II GX | Stratix II GX |
| Logic Elements | 33880 | — |
| Logic Array Blocks (LABs) | 1694 | — |
| Total Memory Bits | 1369728 | — |
| User I/O Count | 361 | 361 |
| Nominal Core Supply Voltage | 1.2 V | — |
| Maximum Internal Clock Frequency | 717 MHz | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Number of PLLs | 4 | — |
| Paket | 780-ball FC-FBGA, 29 x 29 mm, 1 mm pitch | 780-ball FC-FBGA, 29x29 mm, 1 mm pitch |
| Package Outline Reference | MS-034AAM-1 | — |
| Temperature Grade | Industrial (-40C to +100C) | — |
| Transceivers | [DATA_NEEDED: number of multi-gigabit transceivers per Stratix II GX ordering code] | — |
| Status RoHS | Lead-free / RoHS compliant (N suffix) | [DATA_NEEDED: RoHS status] |
| Tipe Mounting | Surface Mount (BGA) | Surface Mount (Flip-chip BGA) |
| Family | — | Stratix II GX |
| Logic Elements / Cells | — | 33,880 |
| Total RAM Bits | — | 1,369,728 |
| Number of LABs | — | 1,694 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Nominal Supply Voltage (Core) | — | 1.2 V |
| Internal Operating Frequency | — | 622 MHz |
| Frekuensi Bawah Maximum | — | 717 MHz |
| Suhu Kerja | — | -40C to +85C (Industrial) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Level MSL | — | [DATA_NEEDED: MSL level] |
| Number of Transceivers | — | [DATA_NEEDED: number of transceiver channels] |
| Number of PLLs / DLLs | — | [DATA_NEEDED: number of PLLs] |