EP3SE260F1517C4L vs EP3SE260F1517I4LN Comparison
Detailed side-by-side comparison of EP3SE260F1517C4L by Altera and EP3SE260F1517I4LN by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP3SE260F1517I4LN - 260K LE Stratix III E FPGA, 1517-FCBGA | Intel
EP3SE260F1517I4LN β Last Time BuySpecification Comparison
| Parameter | EP3SE260F1517C4L | EP3SE260F1517I4LN |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15,100.00 | $2,895.00 |
| Family | Stratix III E | Stratix III E (Enhanced) |
| Logic Elements | 255,000 | 255,000 |
| Embedded Memory Bits | 16,672,768 | 16,672,768 bits (~2,044 KBytes) |
| Number of User I/O | 976 | β |
| Package | 1517-BBGA, FCBGA (FineLine BGA) | 1517-ball FCBGA (40 mm x 40 mm, 1.0 mm pitch) |
| Process Technology | 65 nm | 40 nm CMOS |
| Core Voltage | 1.1 V | β |
| Maximum Operating Frequency | 450 MHz | β |
| Number of Transceivers | 16 | β |
| Transceiver Data Rate (Max) | 1.25 Gbps | β |
| Multiplier Blocks (18x18) | 384 | β |
| Total TriMatrix Memory | 15.04 Mbits (MLAB + M9K + M144K) | β |
| PLLs | 4 per quadrant + 8 fractional PLLs | β |
| Operating Temperature | 0C to +85C (commercial) | -40C to +100C (case, industrial) |
| Mounting Type | Surface Mount (BGA) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Logic Array Blocks (LABs) | β | 10,200 |
| User I/O Count | β | 976 |
| Speed Grade | β | I4 (industrial, 4th tier) |
| Power Option | β | L (low-power) |
| Lead-Free / RoHS | β | Yes (N suffix) |
| Transceivers | β | Stratix III E family supports up to 24 transceivers up to 8.5 Gbps |
| DSP Blocks (18x18 multipliers) | β | Up to 384 (family-level, device-specific count not in provided data) |
| Partial Reconfiguration | β | Supported |
| Memory Interface Support | β | DDR3, DDR2, QDR II+ (hardened PHY) |
| Configuration Scheme | β | Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP), JTAG |