EP3SE260F1517C4L vs EP3SE260F1517I4LN Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE260F1517C4L sa pamamagitan ng Altera at EP3SE260F1517I4LN sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE260F1517I4LN - 260K LE Stratix III E FPGA, 1517-FCBGA | Intel
EP3SE260F1517I4LN ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SE260F1517C4L | EP3SE260F1517I4LN |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix III E | Stratix III E (Enhanced) |
| Logic Elements | 255,000 | 255,000 |
| Embedded Memory Bits | 16,672,768 | 16,672,768 bits (~2,044 KBytes) |
| Number of User I/O | 976 | — |
| Packhaging | 1517-BBGA, FCBGA (FineLine BGA) | 1517-ball FCBGA (40 mm x 40 mm, 1.0 mm pitch) |
| Process Technology | 65 nm | 40 nm CMOS |
| Core Voltage | 1.1 V | — |
| Maximum Operating Frequency | 450 MHz | — |
| Number of Transceivers | 16 | — |
| Transceiver Data Rate (Max) | 1.25 Gbps | — |
| Multiplier Blocks (18x18) | 384 | — |
| Total TriMatrix Memory | 15.04 Mbits (MLAB + M9K + M144K) | — |
| PLLs | 4 per quadrant + 8 fractional PLLs | — |
| Temperature na Operasyon | 0C to +85C (commercial) | -40C to +100C (case, industrial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Logic Array Blocks (LABs) | — | 10,200 |
| User I/O Count | — | 976 |
| Speed Grade | — | I4 (industrial, 4th tier) |
| Power Option | — | L (low-power) |
| Lead-Free / RoHS | — | Yes (N suffix) |
| Transceivers | — | Stratix III E family supports up to 24 transceivers up to 8.5 Gbps |
| DSP Blocks (18x18 multipliers) | — | Up to 384 (family-level, device-specific count not in provided data) |
| Partial Reconfiguration | — | Supported |
| Memory Interface Support | — | DDR3, DDR2, QDR II+ (hardened PHY) |
| Configuration Scheme | — | Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP), JTAG |