EP4SGX360FH29I3N vs EP4SGX360FH29I4N Comparison
Detailed side-by-side comparison of EP4SGX360FH29I3N by Altera and EP4SGX360FH29I4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP4SGX360FH29I3N - Stratix IV GX FPGA, 353600 Cells, 780-FCBGA | Altera
EP4SGX360FH29I3N β Last Time BuyIntel
EP4SGX360FH29I4N - Stratix IV GX FPGA 360K LE, 780-BGA | Intel
EP4SGX360FH29I4N β Last Time BuySpecification Comparison
| Parameter | EP4SGX360FH29I3N | EP4SGX360FH29I4N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,950.00 | $3,720.00 |
| Family | Stratix IV GX | Stratix IV GX |
| Logic Elements | 353,600 | 353,600 |
| Adaptive Logic Modules (ALMs) | 14,144 | β |
| Embedded Memory | 23,105,536 bits (22.0 Mbit) | 23,105,536 bits |
| Embedded 18x18 Multipliers | 1,320 | β |
| User I/Os | 289 | 289 |
| Transceiver Channels | 24 (up to 8.5 Gbps) | β |
| Process Technology | 40 nm | β |
| Core Voltage | 0.9 V | β |
| Package | 780-ball FCBGA (FH29), flip-chip | 780-BGA, FCBGA (FH29) |
| Operating Temperature | -40C to +100C (Industrial) | -40C to +100C (industrial, I4 grade) |
| Hard Memory Controller | Yes (DDR2/DDR3) | β |
| PCIe Hard IP | Yes (Gen1/Gen2 x1/x2/x4) | β |
| Partial Reconfiguration | Supported | β |
| Configuration Scheme | Passive Serial, Fast Passive Parallel, JTAG | β |
| RoHS Status | Compliant | Compliant |
| Series | β | EP4SGX360 |
| Logic Array Blocks (LABs) | β | 14,144 |
| Number of Pins/balls | β | 780 |
| Ball Pitch | β | 1.0 mm |
| Supply Voltage | β | [DATA_NEEDED: core voltage and transceiver supply] |
| Transceiver Count | β | [DATA_NEEDED: exact transceiver count for FH29 package option] |
| Max Transceiver Data Rate | β | 8.5 Gbps |
| Embedded Multipliers (18x18) | β | 36 (per family spec; device-specific value [DATA_NEEDED]) |
| PLLs | β | 4 |
| Process Node | β | 40nm TSMC |
| Mounting Type | β | Surface Mount |
| Configuration Mode | β | JTAG / Active Serial / Passive Parallel |
| Hard PCIe IP | β | PCIe Gen1/Gen2 hard IP blocks |