EP4SGX360FH29I3N vs EP4SGX360FH29I4N 比較
詳細並排比較 EP4SGX360FH29I3N 由 Altera 與 EP4SGX360FH29I4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP4SGX360FH29I3N - Stratix IV GX FPGA, 353600 Cells, 780-FCBGA | Altera
EP4SGX360FH29I3N ⚠ 最後購買機會規格比較
| 參數 | EP4SGX360FH29I3N | EP4SGX360FH29I4N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | 最後購買 |
| Family | Stratix IV GX | Stratix IV GX |
| Logic Elements | 353,600 | 353,600 |
| Adaptive Logic Modules (ALMs) | 14,144 | — |
| Embedded Memory | 23,105,536 bits (22.0 Mbit) | 23,105,536 bits |
| Embedded 18x18 Multipliers | 1,320 | — |
| User I/Os | 289 | 289 |
| Transceiver Channels | 24 (up to 8.5 Gbps) | — |
| Process Technology | 40 nm | — |
| Core Voltage | 0.9 V | — |
| 封裝 | 780-ball FCBGA (FH29), flip-chip | 780-BGA, FCBGA (FH29) |
| 工作溫度 | -40C to +100C (Industrial) | -40C to +100C (industrial, I4 grade) |
| Hard Memory Controller | Yes (DDR2/DDR3) | — |
| PCIe Hard IP | Yes (Gen1/Gen2 x1/x2/x4) | — |
| Partial Reconfiguration | Supported | — |
| Configuration Scheme | Passive Serial, Fast Passive Parallel, JTAG | — |
| RoHS 狀態 | Compliant | Compliant |
| Series | — | EP4SGX360 |
| Logic Array Blocks (LABs) | — | 14,144 |
| Number of Pins/balls | — | 780 |
| Ball Pitch | — | 1.0 mm |
| 供應電壓 | — | [DATA_NEEDED: core voltage and transceiver supply] |
| Transceiver Count | — | [DATA_NEEDED: exact transceiver count for FH29 package option] |
| Max Transceiver Data Rate | — | 8.5 Gbps |
| Embedded Multipliers (18x18) | — | 36 (per family spec; device-specific value [DATA_NEEDED]) |
| PLLs | — | 4 |
| Process Node | — | 40nm TSMC |
| 安裝類型 | — | Surface Mount |
| Configuration Mode | — | JTAG / Active Serial / Passive Parallel |
| Hard PCIe IP | — | PCIe Gen1/Gen2 hard IP blocks |